“Monstrously powerful” Power8 processor is IBM’s big data play
Thu 24 Apr 2014
All the numbers on the scale and technology behind this chip are in this ExtremeTech article. IBM says the new Power Systems will be at the heart of servers that will allow data centres to manage “staggering data requirements with unprecedented speed, all built on an open server platform”.
It is the output of a $2.4 billion, three year development programme that uses “hundreds of IBM patents” and the chips are built for the era of big data. OK then, just a couple of numbers: the one square inch (bless, the imperial Americans) sliver of silicon “is embedded with more than 4 billion microscopic transistors and more than 11 miles of high-speed copper wiring”.
Excerpt
“First, we should talk about the new Power8 chip. There are 12 CPU cores, each with 512KB of L2 SRAM and 8MB of L3 EDRAM, for a total of 6MB L2 and 96MB L3 cache respectively. There is then a further 230GB/sec of bandwidth to 1TB of DRAM. Whereas each Intel Xeon core is capable of two-way simultaneous threading, and Power7+ cores can do four threads, Power8 ups the ante to eight simlutaneous threads (SMT). As you’d expect, other parts of the chip have been similarly expanded to cater for the Power8′s massive parallelism: There are eight decoders (up from 6), six dispatches per clock cycle, a doubling of load units (4), the data cache can now process four 128-bit transactions per cycle, and the bus width between the L2 and data cache is now 512 bits.”
To read the full article click here.
